fact
stringlengths
7
4.84k
type
stringclasses
18 values
library
stringclasses
14 values
imports
listlengths
0
27
filename
stringclasses
205 values
symbolic_name
stringlengths
1
49
docstring
stringlengths
6
2.5k
next (s: state) (b: bool) := match s, b with | SA,false => SB | SA,true => SC | SB,false => SB | SB,true => SD | SC,false => SE | SC,true => SC | SD,false => SF | SD,true => SD | SE,false => SE | SE,true => SG | SF,false => SF | SF,true => Sbad | SG,false => Sbad | SG,true => SG | Sbad,_ => Sbad end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
next
null
accepting (s: state) := match s with | SA | SB | SC | SD | SE | SF | SG => true | Sbad => false end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
accepting
null
run (len: nat) (s: state) (x: Z) : bool := match len with | Datatypes.O => accepting s | Datatypes.S len => run len (next s (Z.odd x)) (Z.div2 x) end.
Fixpoint
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
run
null
logical_imm_length (x: Z) (sixtyfour: bool) : nat := form [BB], that is, two occurrences of the same [n] bits *) let test (n: Z) : bool := Z.eqb (Zzero_ext n x) (Zzero_ext n (Z.shiftr x n)) in at least [2n]. Hence we test with decreasing values of [n]: 32, 16, 8, 4, 2. *) if sixtyfour && negb (test 32) then 64%nat else if negb (test 16) then 32%nat else if negb (test 8) then 16%nat else if negb (test 4) then 8%nat else if negb (test 2) then 4%nat else 2%nat.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
logical_imm_length
The following function determines the candidate length [e], ensuring that [x] is a repetition [BB...B] of a bit pattern [B] of length [e].
is_logical_imm32 (x: int) : bool := negb (Int.eq x Int.zero) && negb (Int.eq x Int.mone) && Automaton.run (logical_imm_length (Int.unsigned x) false) Automaton.start (Int.unsigned x).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
is_logical_imm32
A valid logical immediate is - neither [0] nor [-1]; - composed of a repetition [BBBBB] of a bit-pattern [B] of length [e] - the low [e] bits of the number, that is, [B], match [0*1*0*] or [1*0*1*].
is_logical_imm64 (x: int64) : bool := negb (Int64.eq x Int64.zero) && negb (Int64.eq x Int64.mone) && Automaton.run (logical_imm_length (Int64.unsigned x) true) Automaton.start (Int64.unsigned x).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
is_logical_imm64
null
is_arith_imm32 (x: int) : bool := Int.eq x (Int.zero_ext 12 x) || Int.eq x (Int.shl (Int.zero_ext 12 (Int.shru x (Int.repr 12))) (Int.repr 12)).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
is_arith_imm32
Arithmetic immediates are 12-bit unsigned numbers, possibly shifted left 12 bits
is_arith_imm64 (x: int64) : bool := Int64.eq x (Int64.zero_ext 12 x) || Int64.eq x (Int64.shl (Int64.zero_ext 12 (Int64.shru x (Int64.repr 12))) (Int64.repr 12)).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
is_arith_imm64
null
decompose_int (N: nat) (n p: Z) {struct N} : list (Z * Z) := match N with | Datatypes.O => nil | Datatypes.S N => let frag := Zzero_ext 16 (Z.shiftr n p) in if Z.eqb frag 0 then decompose_int N n (p + 16) else (frag, p) :: decompose_int N (Z.ldiff n (Z.shiftl 65535 p)) (p + 16) end.
Fixpoint
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
decompose_int
Decompose integer literals into 16-bit fragments
negate_decomposition (l: list (Z * Z)) := List.map (fun np => (Z.lxor (fst np) 65535, snd np)) l.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
negate_decomposition
null
loadimm_k (sz: isize) (rd: ireg) (l: list (Z * Z)) (k: code) : code := List.fold_right (fun np k => Pmovk sz rd (fst np) (snd np) :: k) k l.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm_k
null
loadimm_z (sz: isize) (rd: ireg) (l: list (Z * Z)) (k: code) : code := match l with | nil => Pmovz sz rd 0 0 :: k | (n1, p1) :: l => Pmovz sz rd n1 p1 :: loadimm_k sz rd l k end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm_z
null
loadimm_n (sz: isize) (rd: ireg) (l: list (Z * Z)) (k: code) : code := match l with | nil => Pmovn sz rd 0 0 :: k | (n1, p1) :: l => Pmovn sz rd n1 p1 :: loadimm_k sz rd (negate_decomposition l) k end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm_n
null
loadimm (sz: isize) (rd: ireg) (n: Z) (k: code) : code := let N := match sz with W => 2%nat | X => 4%nat end in let dz := decompose_int N n 0 in let dn := decompose_int N (Z.lnot n) 0 in if Nat.leb (List.length dz) (List.length dn) then loadimm_z sz rd dz k else loadimm_n sz rd dn k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm
null
loadimm32 (rd: ireg) (n: int) (k: code) : code := if is_logical_imm32 n then Porrimm W rd XZR (Int.unsigned n) :: k else loadimm W rd (Int.unsigned n) k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm32
null
loadimm64 (rd: ireg) (n: int64) (k: code) : code := if is_logical_imm64 n then Porrimm X rd XZR (Int64.unsigned n) :: k else loadimm X rd (Int64.unsigned n) k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadimm64
null
addimm_aux (insn: iregsp -> iregsp -> Z -> instruction) (rd r1: iregsp) (n: Z) (k: code) := let nlo := Zzero_ext 12 n in let nhi := n - nlo in if Z.eqb nhi 0 then insn rd r1 nlo :: k else if Z.eqb nlo 0 then insn rd r1 nhi :: k else insn rd r1 nhi :: insn rd rd nlo :: k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
addimm_aux
Add immediate
addimm32 (rd r1: ireg) (n: int) (k: code) : code := let m := Int.neg n in if Int.eq n (Int.zero_ext 24 n) then addimm_aux (Paddimm W) rd r1 (Int.unsigned n) k else if Int.eq m (Int.zero_ext 24 m) then addimm_aux (Psubimm W) rd r1 (Int.unsigned m) k else if Int.lt n Int.zero then loadimm32 X16 m (Psub W rd r1 X16 SOnone :: k) else loadimm32 X16 n (Padd W rd r1 X16 SOnone :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
addimm32
null
addimm64 (rd r1: iregsp) (n: int64) (k: code) : code := let m := Int64.neg n in if Int64.eq n (Int64.zero_ext 24 n) then addimm_aux (Paddimm X) rd r1 (Int64.unsigned n) k else if Int64.eq m (Int64.zero_ext 24 m) then addimm_aux (Psubimm X) rd r1 (Int64.unsigned m) k else if Int64.lt n Int64.zero then loadimm64 X16 m (Psubext rd r1 X16 (EOuxtx Int.zero) :: k) else loadimm64 X16 n (Paddext rd r1 X16 (EOuxtx Int.zero) :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
addimm64
null
logicalimm32 (insn1: ireg -> ireg0 -> Z -> instruction) (insn2: ireg -> ireg0 -> ireg -> shift_op -> instruction) (rd r1: ireg) (n: int) (k: code) : code := if is_logical_imm32 n then insn1 rd r1 (Int.unsigned n) :: k else loadimm32 X16 n (insn2 rd r1 X16 SOnone :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
logicalimm32
Logical immediate
logicalimm64 (insn1: ireg -> ireg0 -> Z -> instruction) (insn2: ireg -> ireg0 -> ireg -> shift_op -> instruction) (rd r1: ireg) (n: int64) (k: code) : code := if is_logical_imm64 n then insn1 rd r1 (Int64.unsigned n) :: k else loadimm64 X16 n (insn2 rd r1 X16 SOnone :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
logicalimm64
null
transl_extension (ex: extension) (a: int) : extend_op := match ex with Xsgn32 => EOsxtw a | Xuns32 => EOuxtw a end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_extension
Sign- or zero-extended arithmetic
move_extended_base (rd: ireg) (r1: ireg) (ex: extension) (k: code) : code := match ex with | Xsgn32 => Pcvtsw2x rd r1 :: k | Xuns32 => Pcvtuw2x rd r1 :: k end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
move_extended_base
null
move_extended (rd: ireg) (r1: ireg) (ex: extension) (a: int) (k: code) : code := if Int.eq a Int.zero then move_extended_base rd r1 ex k else move_extended_base rd r1 ex (Padd X rd XZR rd (SOlsl a) :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
move_extended
null
arith_extended (insnX: iregsp -> iregsp -> ireg -> extend_op -> instruction) (insnS: ireg -> ireg0 -> ireg -> shift_op -> instruction) (rd r1 r2: ireg) (ex: extension) (a: int) (k: code) : code := if Int.ltu a (Int.repr 5) then insnX rd r1 r2 (transl_extension ex a) :: k else move_extended_base X16 r2 ex (insnS rd r1 X16 (SOlsl a) :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
arith_extended
null
shrx32 (rd r1: ireg) (n: int) (k: code) : code := if Int.eq n Int.zero then Pmov rd r1 :: k else Porr W X16 XZR r1 (SOasr (Int.repr 31)) :: Padd W X16 r1 X16 (SOlsr (Int.sub Int.iwordsize n)) :: Porr W rd XZR X16 (SOasr n) :: k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
shrx32
Extended right shift
shrx64 (rd r1: ireg) (n: int) (k: code) : code := if Int.eq n Int.zero then Pmov rd r1 :: k else Porr X X16 XZR r1 (SOasr (Int.repr 63)) :: Padd X X16 r1 X16 (SOlsr (Int.sub Int64.iwordsize' n)) :: Porr X rd XZR X16 (SOasr n) :: k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
shrx64
null
loadsymbol (rd: ireg) (id: ident) (ofs: ptrofs) (k: code) : code := if SelectOp.symbol_is_relocatable id then if Ptrofs.eq ofs Ptrofs.zero then Ploadsymbol rd id :: k else Ploadsymbol rd id :: addimm64 rd rd (Ptrofs.to_int64 ofs) k else Padrp rd id ofs :: Paddadr rd rd id ofs :: k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadsymbol
Load the address [id + ofs] in [rd]
transl_shift (s: Op.shift) (a: int): Asm.shift_op := match s with | Slsl => SOlsl a | Slsr => SOlsr a | Sasr => SOasr a | Sror => SOror a end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_shift
Translate a shifted operand
transl_cond (cond: condition) (args: list mreg) (k: code) := match cond, args with | (Ccomp c | Ccompu c), a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Pcmp W r1 r2 SOnone :: k) | (Ccompshift c s a | Ccompushift c s a), a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Pcmp W r1 r2 (transl_shift s a) :: k) | (Ccompimm c n | Ccompuimm c n), a1 :: nil => do r1 <- ireg_of a1; OK (if is_arith_imm32 n then Pcmpimm W r1 (Int.unsigned n) :: k else if is_arith_imm32 (Int.neg n) then Pcmnimm W r1 (Int.unsigned (Int.neg n)) :: k else loadimm32 X16 n (Pcmp W r1 X16 SOnone :: k)) | (Cmaskzero n | Cmasknotzero n), a1 :: nil => do r1 <- ireg_of a1; OK (if is_logical_imm32 n then Ptstimm W r1 (Int.unsigned n) :: k else loadimm32 X16 n (Ptst W r1 X16 SOnone :: k)) | (Ccompl c | Ccomplu c), a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Pcmp X r1 r2 SOnone :: k) | (Ccomplshift c s a | Ccomplushift c s a), a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Pcmp X r1 r2 (transl_shift s a) :: k) | (Ccomplimm c n | Ccompluimm c n), a1 :: nil => do r1 <- ireg_of a1; OK (if is_arith_imm64 n then Pcmpimm X r1 (Int64.unsigned n) :: k else if is_arith_imm64 (Int64.neg n) then Pcmnimm X r1 (Int64.unsigned (Int64.neg n)) :: k else loadimm64 X16 n (Pcmp X r1 X16 SOnone :: k)) | (Cmasklzero n | Cmasklnotzero n), a1 :: nil => do r1 <- ireg_of a1; OK (if is_logical_imm64 n then Ptstimm X r1 (Int64.unsigned n) :: k else loadimm64 X16 n (Ptst X r1 X16 SOnone :: k)) | Ccompf cmp, a1 :: a2 :: nil => do r1 <- freg_of a1; do r2 <- freg_of a2; OK (Pfcmp D r1 r2 :: k) | Cnotcompf cmp, a1 :: a2 :: nil => do r1 <- freg_of a1; do r2 <- freg_of a2; OK (Pfcmp D r1 r2 :: k) | Ccompfzero cmp, a1 :: nil => do r1 <- freg_of a1; ...
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_cond
Translation of a condition. Prepends to [k] the instructions that evaluate the condition and leave its boolean result in one of the bits of the condition register. The bit in question is determined by the [crbit_for_cond] function.
cond_for_signed_cmp (cmp: comparison) := match cmp with | Ceq => TCeq | Cne => TCne | Clt => TClt | Cle => TCle | Cgt => TCgt | Cge => TCge end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
cond_for_signed_cmp
null
cond_for_unsigned_cmp (cmp: comparison) := match cmp with | Ceq => TCeq | Cne => TCne | Clt => TClo | Cle => TCls | Cgt => TChi | Cge => TChs end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
cond_for_unsigned_cmp
null
cond_for_float_cmp (cmp: comparison) := match cmp with | Ceq => TCeq | Cne => TCne | Clt => TCmi | Cle => TCls | Cgt => TCgt | Cge => TCge end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
cond_for_float_cmp
null
cond_for_float_not_cmp (cmp: comparison) := match cmp with | Ceq => TCne | Cne => TCeq | Clt => TCpl | Cle => TChi | Cgt => TCle | Cge => TClt end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
cond_for_float_not_cmp
null
cond_for_cond (cond: condition) := match cond with | Ccomp cmp => cond_for_signed_cmp cmp | Ccompu cmp => cond_for_unsigned_cmp cmp | Ccompshift cmp s a => cond_for_signed_cmp cmp | Ccompushift cmp s a => cond_for_unsigned_cmp cmp | Ccompimm cmp n => cond_for_signed_cmp cmp | Ccompuimm cmp n => cond_for_unsigned_cmp cmp | Cmaskzero n => TCeq | Cmasknotzero n => TCne | Ccompl cmp => cond_for_signed_cmp cmp | Ccomplu cmp => cond_for_unsigned_cmp cmp | Ccomplshift cmp s a => cond_for_signed_cmp cmp | Ccomplushift cmp s a => cond_for_unsigned_cmp cmp | Ccomplimm cmp n => cond_for_signed_cmp cmp | Ccompluimm cmp n => cond_for_unsigned_cmp cmp | Cmasklzero n => TCeq | Cmasklnotzero n => TCne | Ccompf cmp => cond_for_float_cmp cmp | Cnotcompf cmp => cond_for_float_not_cmp cmp | Ccompfzero cmp => cond_for_float_cmp cmp | Cnotcompfzero cmp => cond_for_float_not_cmp cmp | Ccompfs cmp => cond_for_float_cmp cmp | Cnotcompfs cmp => cond_for_float_not_cmp cmp | Ccompfszero cmp => cond_for_float_cmp cmp | Cnotcompfszero cmp => cond_for_float_not_cmp cmp end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
cond_for_cond
null
transl_cond_branch_default (c: condition) (args: list mreg) (lbl: label) (k: code) := transl_cond c args (Pbc (cond_for_cond c) lbl :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_cond_branch_default
Translation of a conditional branch. Prepends to [k] the instructions that evaluate the condition and ranch to [lbl] if it holds. We recognize some conditional branches that can be implemented without setting then testing condition flags.
transl_cond_branch (c: condition) (args: list mreg) (lbl: label) (k: code) := match args, c with | a1 :: nil, (Ccompimm Cne n | Ccompuimm Cne n) => if Int.eq n Int.zero then (do r1 <- ireg_of a1; OK (Pcbnz W r1 lbl :: k)) else transl_cond_branch_default c args lbl k | a1 :: nil, (Ccompimm Ceq n | Ccompuimm Ceq n) => if Int.eq n Int.zero then (do r1 <- ireg_of a1; OK (Pcbz W r1 lbl :: k)) else transl_cond_branch_default c args lbl k | a1 :: nil, (Ccomplimm Cne n | Ccompluimm Cne n) => if Int64.eq n Int64.zero then (do r1 <- ireg_of a1; OK (Pcbnz X r1 lbl :: k)) else transl_cond_branch_default c args lbl k | a1 :: nil, (Ccomplimm Ceq n | Ccompluimm Ceq n) => if Int64.eq n Int64.zero then (do r1 <- ireg_of a1; OK (Pcbz X r1 lbl :: k)) else transl_cond_branch_default c args lbl k | a1 :: nil, Cmaskzero n => match Int.is_power2 n with | Some bit => do r1 <- ireg_of a1; OK (Ptbz W r1 bit lbl :: k) | None => transl_cond_branch_default c args lbl k end | a1 :: nil, Cmasknotzero n => match Int.is_power2 n with | Some bit => do r1 <- ireg_of a1; OK (Ptbnz W r1 bit lbl :: k) | None => transl_cond_branch_default c args lbl k end | a1 :: nil, Cmasklzero n => match Int64.is_power2' n with | Some bit => do r1 <- ireg_of a1; OK (Ptbz X r1 bit lbl :: k) | None => transl_cond_branch_default c args lbl k end | a1 :: nil, Cmasklnotzero n => match Int64.is_power2' n with | Some bit => do r1 <- ireg_of a1; OK (Ptbnz X r1 bit lbl :: k) | None => transl_cond_branch_default c args lbl k end | _, _ => transl_cond_branch_default c args lbl k end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_cond_branch
null
transl_op (op: operation) (args: list mreg) (res: mreg) (k: code) := match op, args with | Omove, a1 :: nil => match preg_of res, preg_of a1 with | IR r, IR a => OK (Pmov r a :: k) | FR r, FR a => OK (Pfmov r a :: k) | _ , _ => Error(msg "Asmgen.Omove") end | Ointconst n, nil => do rd <- ireg_of res; OK (loadimm32 rd n k) | Olongconst n, nil => do rd <- ireg_of res; OK (loadimm64 rd n k) | Ofloatconst f, nil => do rd <- freg_of res; OK (if Float.eq_dec f Float.zero then Pfmovi D rd XZR :: k else Pfmovimmd rd f :: k) | Osingleconst f, nil => do rd <- freg_of res; OK (if Float32.eq_dec f Float32.zero then Pfmovi S rd XZR :: k else Pfmovimms rd f :: k) | Oaddrsymbol id ofs, nil => do rd <- ireg_of res; OK (loadsymbol rd id ofs k) | Oaddrstack ofs, nil => do rd <- ireg_of res; OK (addimm64 rd XSP (Ptrofs.to_int64 ofs) k) | Oshift s a, a1 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; OK (Porr W rd XZR r1 (transl_shift s a) :: k) | Oadd, a1 :: a2 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Padd W rd r1 r2 SOnone :: k) | Oaddshift s a, a1 :: a2 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (Padd W rd r1 r2 (transl_shift s a) :: k) | Oaddimm n, a1 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; OK (addimm32 rd r1 n k) | Oneg, a1 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; OK (Psub W rd XZR r1 SOnone :: k) | Onegshift s a, a1 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; OK (Psub W rd XZR r1 (transl_shift s a) :: k) | Osub, a1 :: a2 :: nil => do rd <- ireg_of res; do r1 <- ireg_of a1; do r2 <- ireg_of a2; ...
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_op
Translation of the arithmetic operation [res <- op(args)]. The corresponding instructions are prepended to [k].
offset_representable (sz: Z) (ofs: int64) : bool := let isz := Int64.repr sz in Int64.eq ofs (Int64.sign_ext 9 ofs) || (Int64.eq (Int64.modu ofs isz) Int64.zero && Int64.ltu ofs (Int64.shl isz (Int64.repr 12))).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
offset_representable
Translation of addressing modes
transl_addressing (sz: Z) (addr: Op.addressing) (args: list mreg) (insn: Asm.addressing -> instruction) (k: code) : res code := match addr, args with | Aindexed ofs, a1 :: nil => do r1 <- ireg_of a1; if offset_representable sz ofs then OK (insn (ADimm r1 ofs) :: k) else OK (loadimm64 X16 ofs (insn (ADreg r1 X16) :: k)) | Aindexed2, a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; OK (insn (ADreg r1 r2) :: k) | Aindexed2shift a, a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; if Int.eq a Int.zero then OK (insn (ADreg r1 r2) :: k) else if Int.eq (Int.shl Int.one a) (Int.repr sz) then OK (insn (ADlsl r1 r2 a) :: k) else OK (Padd X X16 r1 r2 (SOlsl a) :: insn (ADimm X16 Int64.zero) :: k) | Aindexed2ext x a, a1 :: a2 :: nil => do r1 <- ireg_of a1; do r2 <- ireg_of a2; if Int.eq a Int.zero || Int.eq (Int.shl Int.one a) (Int.repr sz) then OK (insn (match x with Xsgn32 => ADsxt r1 r2 a | Xuns32 => ADuxt r1 r2 a end) :: k) else OK (arith_extended Paddext (Padd X) X16 r1 r2 x a (insn (ADimm X16 Int64.zero) :: k)) | Aglobal id ofs, nil => assertion (negb (SelectOp.symbol_is_relocatable id)); if Ptrofs.eq (Ptrofs.modu ofs (Ptrofs.repr sz)) Ptrofs.zero && symbol_is_aligned id sz then OK (Padrp X16 id ofs :: insn (ADadr X16 id ofs) :: k) else OK (loadsymbol X16 id ofs (insn (ADimm X16 Int64.zero) :: k)) | Ainstack ofs, nil => let ofs := Ptrofs.to_int64 ofs in if offset_representable sz ofs then OK (insn (ADimm XSP ofs) :: k) else OK (loadimm64 X16 ofs (insn (ADreg XSP X16) :: k)) | _, _ => Error(msg "Asmgen.transl_addressing") end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_addressing
null
transl_load (chunk: memory_chunk) (addr: Op.addressing) (args: list mreg) (dst: mreg) (k: code) : res code := match chunk with | Mint8unsigned => do rd <- ireg_of dst; transl_addressing 1 addr args (Pldrb W rd) k | Mint8signed => do rd <- ireg_of dst; transl_addressing 1 addr args (Pldrsb W rd) k | Mint16unsigned => do rd <- ireg_of dst; transl_addressing 2 addr args (Pldrh W rd) k | Mint16signed => do rd <- ireg_of dst; transl_addressing 2 addr args (Pldrsh W rd) k | Mint32 => do rd <- ireg_of dst; transl_addressing 4 addr args (Pldrw rd) k | Mint64 => do rd <- ireg_of dst; transl_addressing 8 addr args (Pldrx rd) k | Mfloat32 => do rd <- freg_of dst; transl_addressing 4 addr args (Pldrs rd) k | Mfloat64 => do rd <- freg_of dst; transl_addressing 8 addr args (Pldrd rd) k | Many32 => do rd <- ireg_of dst; transl_addressing 4 addr args (Pldrw_a rd) k | Many64 => do rd <- ireg_of dst; transl_addressing 8 addr args (Pldrx_a rd) k | _ => Error (msg "Asmgen.transl_load") end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_load
Translation of loads and stores
transl_store (chunk: memory_chunk) (addr: Op.addressing) (args: list mreg) (src: mreg) (k: code) : res code := match chunk with | Mint8unsigned => do r1 <- ireg_of src; transl_addressing 1 addr args (Pstrb r1) k | Mint16unsigned => do r1 <- ireg_of src; transl_addressing 2 addr args (Pstrh r1) k | Mint32 => do r1 <- ireg_of src; transl_addressing 4 addr args (Pstrw r1) k | Mint64 => do r1 <- ireg_of src; transl_addressing 8 addr args (Pstrx r1) k | Mfloat32 => do r1 <- freg_of src; transl_addressing 4 addr args (Pstrs r1) k | Mfloat64 => do r1 <- freg_of src; transl_addressing 8 addr args (Pstrd r1) k | Many32 => do r1 <- ireg_of src; transl_addressing 4 addr args (Pstrw_a r1) k | Many64 => do r1 <- ireg_of src; transl_addressing 8 addr args (Pstrx_a r1) k | _ => Error (msg "Asmgen.transl_store") end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_store
null
indexed_memory_access (insn: Asm.addressing -> instruction) (sz: Z) (base: iregsp) (ofs: ptrofs) (k: code) := let ofs := Ptrofs.to_int64 ofs in if offset_representable sz ofs then insn (ADimm base ofs) :: k else loadimm64 X16 ofs (insn (ADreg base X16) :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
indexed_memory_access
Register-indexed loads and stores
loadind (base: iregsp) (ofs: ptrofs) (ty: typ) (dst: mreg) (k: code) := match ty, preg_of dst with | Tint, IR rd => OK (indexed_memory_access (Pldrw rd) 4 base ofs k) | Tlong, IR rd => OK (indexed_memory_access (Pldrx rd) 8 base ofs k) | Tsingle, FR rd => OK (indexed_memory_access (Pldrs rd) 4 base ofs k) | Tfloat, FR rd => OK (indexed_memory_access (Pldrd rd) 8 base ofs k) | Tany32, IR rd => OK (indexed_memory_access (Pldrw_a rd) 4 base ofs k) | Tany64, IR rd => OK (indexed_memory_access (Pldrx_a rd) 8 base ofs k) | Tany64, FR rd => OK (indexed_memory_access (Pldrd_a rd) 8 base ofs k) | _, _ => Error (msg "Asmgen.loadind") end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadind
null
storeind (src: mreg) (base: iregsp) (ofs: ptrofs) (ty: typ) (k: code) := match ty, preg_of src with | Tint, IR rd => OK (indexed_memory_access (Pstrw rd) 4 base ofs k) | Tlong, IR rd => OK (indexed_memory_access (Pstrx rd) 8 base ofs k) | Tsingle, FR rd => OK (indexed_memory_access (Pstrs rd) 4 base ofs k) | Tfloat, FR rd => OK (indexed_memory_access (Pstrd rd) 8 base ofs k) | Tany32, IR rd => OK (indexed_memory_access (Pstrw_a rd) 4 base ofs k) | Tany64, IR rd => OK (indexed_memory_access (Pstrx_a rd) 8 base ofs k) | Tany64, FR rd => OK (indexed_memory_access (Pstrd_a rd) 8 base ofs k) | _, _ => Error (msg "Asmgen.storeind") end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
storeind
null
loadptr (base: iregsp) (ofs: ptrofs) (dst: ireg) (k: code) := indexed_memory_access (Pldrx dst) 8 base ofs k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
loadptr
null
storeptr (src: ireg) (base: iregsp) (ofs: ptrofs) (k: code) := indexed_memory_access (Pstrx src) 8 base ofs k.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
storeptr
null
make_epilogue (f: Mach.function) (k: code) := loadptr XSP f.(fn_retaddr_ofs) RA (Pfreeframe f.(fn_stacksize) f.(fn_link_ofs) :: k).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
make_epilogue
Function epilogue
transl_instr (f: Mach.function) (i: Mach.instruction) (r15_is_parent: bool) (k: code) : res code := match i with | Mgetstack ofs ty dst => loadind XSP ofs ty dst k | Msetstack src ofs ty => storeind src XSP ofs ty k | Mgetparam ofs ty dst => do c <- loadind X15 ofs ty dst k; OK (if r15_is_parent then c else loadptr XSP f.(fn_link_ofs) X15 c) | Mop op args res => transl_op op args res k | Mload chunk addr args dst => transl_load chunk addr args dst k | Mstore chunk addr args src => transl_store chunk addr args src k | Mcall sig (inl r) => do r1 <- ireg_of r; OK (Pblr r1 sig :: k) | Mcall sig (inr symb) => OK (Pbl symb sig :: k) | Mtailcall sig (inl r) => do r1 <- ireg_of r; OK (make_epilogue f (Pbr r1 sig :: k)) | Mtailcall sig (inr symb) => OK (make_epilogue f (Pbs symb sig :: k)) | Mbuiltin ef args res => OK (Pbuiltin ef (List.map (map_builtin_arg preg_of) args) (map_builtin_res preg_of res) :: k) | Mlabel lbl => OK (Plabel lbl :: k) | Mgoto lbl => OK (Pb lbl :: k) | Mcond cond args lbl => transl_cond_branch cond args lbl k | Mjumptable arg tbl => do r <- ireg_of arg; OK (Pbtbl r tbl :: k) | Mreturn => OK (make_epilogue f (Pret RA :: k)) end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_instr
Translation of a Mach instruction.
it1_is_parent (before: bool) (i: Mach.instruction) : bool := match i with | Msetstack src ofs ty => before | Mgetparam ofs ty dst => negb (mreg_eq dst R15) | Mop op args res => before && negb (mreg_eq res R15) | _ => false end.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
it1_is_parent
Translation of a code sequence
transl_code (f: Mach.function) (il: list Mach.instruction) (it1p: bool) := match il with | nil => OK nil | i1 :: il' => do k <- transl_code f il' (it1_is_parent it1p i1); transl_instr f i1 it1p k end.
Fixpoint
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_code
This is the naive definition that we no longer use because it is not tail-recursive. It is kept as specification.
transl_code_rec (f: Mach.function) (il: list Mach.instruction) (it1p: bool) (k: code -> res code) := match il with | nil => k nil | i1 :: il' => transl_code_rec f il' (it1_is_parent it1p i1) (fun c1 => do c2 <- transl_instr f i1 it1p c1; k c2) end.
Fixpoint
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_code_rec
This is an equivalent definition in continuation-passing style that runs in constant stack space.
transl_code' (f: Mach.function) (il: list Mach.instruction) (it1p: bool) := transl_code_rec f il it1p (fun c => OK c).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_code
null
transl_function (f: Mach.function) := do c <- transl_code' f f.(Mach.fn_code) true; OK (mkfunction f.(Mach.fn_sig) (Pallocframe f.(fn_stacksize) f.(fn_link_ofs) :: storeptr RA XSP f.(fn_retaddr_ofs) (Pcfi_rel_offset (Ptrofs.to_int f.(fn_retaddr_ofs)):: c))).
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transl_function
Translation of a whole function. Note that we must check that the generated code contains less than [2^32] instructions, otherwise the offset part of the [PC] code pointer could wrap around, leading to incorrect executions.
transf_function (f: Mach.function) : res Asm.function := do tf <- transl_function f; if zlt Ptrofs.max_unsigned (list_length_z tf.(fn_code)) then Error (msg "code size exceeded") else OK tf.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transf_function
null
transf_fundef (f: Mach.fundef) : res Asm.fundef := transf_partial_fundef transf_function f.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transf_fundef
null
transf_program (p: Mach.program) : res Asm.program := transform_partial_program transf_fundef p.
Definition
aarch64
[ "Coq.Recdef", "Coq.Zwf", "Zbits", "Coqlib", "Errors", "AST", "Integers", "Floats", "Op", "Locations", "Mach", "Asm" ]
aarch64/Asmgen.v
transf_program
null
match_prog (p: Mach.program) (tp: Asm.program) := match_program (fun _ f tf => transf_fundef f = OK tf) eq p tp.
Definition
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
match_prog
null
transf_program_match: forall p tp, transf_program p = OK tp -> match_prog p tp.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transf_program_match
null
ge := Genv.globalenv prog.
Let
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
ge
null
tge := Genv.globalenv tprog.
Let
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
tge
null
symbols_preserved: forall (s: ident), Genv.find_symbol tge s = Genv.find_symbol ge s.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
symbols_preserved
null
senv_preserved: Senv.equiv ge tge.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
senv_preserved
null
functions_translated: forall b f, Genv.find_funct_ptr ge b = Some f -> exists tf, Genv.find_funct_ptr tge b = Some tf /\ transf_fundef f = OK tf.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
functions_translated
null
functions_transl: forall fb f tf, Genv.find_funct_ptr ge fb = Some (Internal f) -> transf_function f = OK tf -> Genv.find_funct_ptr tge fb = Some (Internal tf).
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
functions_transl
null
transf_function_no_overflow: forall f tf, transf_function f = OK tf -> list_length_z tf.(fn_code) <= Ptrofs.max_unsigned.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transf_function_no_overflow
* Properties of control flow
exec_straight_exec: forall fb f c ep tf tc c' rs m rs' m', transl_code_at_pc ge (rs PC) fb f c ep tf tc -> exec_straight tge tf tc rs m c' rs' m' -> plus step tge (State rs m) E0 (State rs' m').
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
exec_straight_exec
null
exec_straight_at: forall fb f c ep tf tc c' ep' tc' rs m rs' m', transl_code_at_pc ge (rs PC) fb f c ep tf tc -> transl_code f c' ep' = OK tc' -> exec_straight tge tf tc rs m tc' rs' m' -> transl_code_at_pc ge (rs' PC) fb f c' ep' tf tc'.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
exec_straight_at
null
loadimm_z_label: forall sz rd l k, tail_nolabel k (loadimm_z sz rd l k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadimm_z_label
null
loadimm_n_label: forall sz rd l k, tail_nolabel k (loadimm_n sz rd l k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadimm_n_label
null
loadimm_label: forall sz rd n k, tail_nolabel k (loadimm sz rd n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadimm_label
null
loadimm32_label: forall r n k, tail_nolabel k (loadimm32 r n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadimm32_label
null
loadimm64_label: forall r n k, tail_nolabel k (loadimm64 r n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadimm64_label
null
addimm_aux: forall insn rd r1 n k, (forall rd r1 n, nolabel (insn rd r1 n)) -> tail_nolabel k (addimm_aux insn rd r1 n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
addimm_aux
null
addimm32_label: forall rd r1 n k, tail_nolabel k (addimm32 rd r1 n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
addimm32_label
null
addimm64_label: forall rd r1 n k, tail_nolabel k (addimm64 rd r1 n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
addimm64_label
null
logicalimm32_label: forall insn1 insn2 rd r1 n k, (forall rd r1 n, nolabel (insn1 rd r1 n)) -> (forall rd r1 r2 s, nolabel (insn2 rd r1 r2 s)) -> tail_nolabel k (logicalimm32 insn1 insn2 rd r1 n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
logicalimm32_label
null
logicalimm64_label: forall insn1 insn2 rd r1 n k, (forall rd r1 n, nolabel (insn1 rd r1 n)) -> (forall rd r1 r2 s, nolabel (insn2 rd r1 r2 s)) -> tail_nolabel k (logicalimm64 insn1 insn2 rd r1 n k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
logicalimm64_label
null
move_extended_label: forall rd r1 ex a k, tail_nolabel k (move_extended rd r1 ex a k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
move_extended_label
null
arith_extended_label: forall insnX insnS rd r1 r2 ex a k, (forall rd r1 r2 x, nolabel (insnX rd r1 r2 x)) -> (forall rd r1 r2 s, nolabel (insnS rd r1 r2 s)) -> tail_nolabel k (arith_extended insnX insnS rd r1 r2 ex a k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
arith_extended_label
null
loadsymbol_label: forall r id ofs k, tail_nolabel k (loadsymbol r id ofs k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadsymbol_label
null
transl_cond_label: forall cond args k c, transl_cond cond args k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_cond_label
null
transl_cond_branch_default_label: forall cond args lbl k c, transl_cond_branch_default cond args lbl k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_cond_branch_default_label
null
transl_cond_branch_label: forall cond args lbl k c, transl_cond_branch cond args lbl k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_cond_branch_label
null
transl_op_label: forall op args r k c, transl_op op args r k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_op_label
null
transl_addressing_label: forall sz addr args insn k c, transl_addressing sz addr args insn k = OK c -> (forall ad, nolabel (insn ad)) -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_addressing_label
null
transl_load_label: forall chunk addr args dst k c, transl_load chunk addr args dst k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_load_label
null
transl_store_label: forall chunk addr args src k c, transl_store chunk addr args src k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_store_label
null
indexed_memory_access_label: forall insn sz base ofs k, (forall ad, nolabel (insn ad)) -> tail_nolabel k (indexed_memory_access insn sz base ofs k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
indexed_memory_access_label
null
loadind_label: forall base ofs ty dst k c, loadind base ofs ty dst k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadind_label
null
storeind_label: forall src base ofs ty k c, storeind src base ofs ty k = OK c -> tail_nolabel k c.
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
storeind_label
null
loadptr_label: forall base ofs dst k, tail_nolabel k (loadptr base ofs dst k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
loadptr_label
null
storeptr_label: forall src base ofs k, tail_nolabel k (storeptr src base ofs k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
storeptr_label
null
make_epilogue_label: forall f k, tail_nolabel k (make_epilogue f k).
Remark
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
make_epilogue_label
null
transl_instr_label: forall f i ep k c, transl_instr f i ep k = OK c -> match i with Mlabel lbl => c = Plabel lbl :: k | _ => tail_nolabel k c end.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_instr_label
null
transl_instr_label': forall lbl f i ep k c, transl_instr f i ep k = OK c -> find_label lbl c = if Mach.is_label lbl i then Some k else find_label lbl k.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_instr_label
null
transl_code_label: forall lbl f c ep tc, transl_code f c ep = OK tc -> match Mach.find_label lbl c with | None => find_label lbl tc = None | Some c' => exists tc', find_label lbl tc = Some tc' /\ transl_code f c' false = OK tc' end.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_code_label
null
transl_find_label: forall lbl f tf, transf_function f = OK tf -> match Mach.find_label lbl f.(Mach.fn_code) with | None => find_label lbl tf.(fn_code) = None | Some c => exists tc, find_label lbl tf.(fn_code) = Some tc /\ transl_code f c false = OK tc end.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
transl_find_label
null
find_label_goto_label: forall f tf lbl rs m c' b ofs, Genv.find_funct_ptr ge b = Some (Internal f) -> transf_function f = OK tf -> rs PC = Vptr b ofs -> Mach.find_label lbl f.(Mach.fn_code) = Some c' -> exists tc', exists rs', goto_label tf lbl rs m = Next rs' m /\ transl_code_at_pc ge (rs' PC) b f c' false tf tc' /\ forall r, r <> PC -> rs'#r = rs#r.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
find_label_goto_label
A valid branch in a piece of Mach code translates to a valid ``go to'' transition in the generated Asm code.
return_address_exists: forall f sg ros c, is_tail (Mcall sg ros :: c) f.(Mach.fn_code) -> exists ra, return_address_offset f c ra.
Lemma
aarch64
[ "Coqlib", "Errors", "Integers", "Floats", "AST", "Linking", "Values", "Memory", "Events", "Globalenvs", "Smallstep", "Op", "Locations", "Mach", "Conventions", "Asm", "Asmgen", "Asmgenproof0", "Asmgenproof1" ]
aarch64/Asmgenproof.v
return_address_exists
Existence of return addresses